Thyristor Leg

Description of the Thyristor Leg in Schematic Editor.

A block diagram and input parameters for the Thyristor Leg are given in Table 1.

Table 1. Thyristor Leg component in the Schematic Editor core library
component component dialog window component parameters
  • Control source (Digital inputs, Model)
  • S1 (digital input selection for switch S1)
  • S2 (digital input selection for switch S2)
  • S1 logic (active high, active low)
  • S2 logic (active high, active low)
  • Gate control enabling (enables usage of external digital signal to enable the switching)
  • Sen (digital input selection for PWM enable)
  • Sen_logic (active high, active low)
Weight = 1

Digital inputs, when selected as the Control parameter, enables you to assign gate drive inputs to any of the digital input pins. For example, if S1 is assigned to 1, the digital input pin 1 will be routed to the S1 switch gate drive. In addition, the gate_logic parameter is set to either active high (i.e. high-level input voltage VIH which turns on the switch) or active low (i.e. low-level input voltage VIL which turns on the switch). The gate drive logic depends on your external controller design.

Model, when selected as the Control parameter, enables you to set the thyristor gate drive signal directly from the signal processing model. The input pin appears on the component and requires a vector input of two gate drive signals in the following order: [S1, S2]. When controlled from the model, the logic is always set to active high.

Figure 1. A schematic block diagram of a Thyristor Leg component with corresponding switch naming

PESB Optimization

The PESB Optimization option is available in certain converter models. When PESB Optimization is enabled, all converter's short circuit state space modes will be merged and treated as the same state space mode. For example, if one converter leg within the three phase converter is short circuited and PESB Optimization is enabled, all of the legs within the three phase converter will also be short circuited. This simplification for short circuit modeling can save a significant amount of matrix memory.

Digital Alias

If a converter is controlled by digital inputs, an alias for every digital input used by the converter will be created. Digital input aliases will be available under the Digital inputs list alongside existing Digital input signals. The alias will be shown as Converter_name.Switch_name, where Converter_name is name of the converter component and Switch_name is name of the controllable switch in the converter.