Unable to Initialize Analog Signals VHIL

Question

Hello,

I am currently trying to run on the VHIL a model containing a FMU imported from a third party modelling environment.

When compiling and reloading the .tse model from the schematic editor into the HIL SCADA, the following error is reported in the message log: "Unable to initialize Analog Signals!".

Inside the model I am trying to compile, only SCADA input/output are present besides the FMU.

What could be the issue?

Thank you,

Luca

Answer 1

Hi Luca,

You can try to recheck the model window for any block containing analog signals like Analog Input, Output Settings, etc.
Maybe it is caused since that component is placed in the window somewhere by mistake.

I suggest instead of finding it, try to copy your model into a new .tse file and then compile to check if the error still persists.

Regards
Era

Answer 2

Greetings,

Usually, the model consists of SCADA Outputs and FMUs should be easily loaded to VHIL without any issues. If you want, feel free to attach the model here for evaluation.