HIL604 loses PTP "Synchronized" ~15 s after start; simulation drifts -10 ppm vs grandmaster

Question

Hello,

We use a HIL604 to drive IEC 61850-9-2 merging units that are themselves PTP-synchronized, so we need the HIL simulation to stay locked to the same PTP grandmaster. The HIL starts on a PTP second as expected, but it does not stay synchronized.

Setup

• Device: HIL604, serial 00604-14-00536, firmware release 132776977 (as reported by the device manager), calibration date 2024-02-05.
• Software: Typhoon HIL Control Center 2026.2, Python API typhoon_hil_api 1.31.3, controlled from a Linux PC (Debian 12) through the Python API.

Model: core/Time Synchronization component

• sync_source PTP, eth_port 2, execution_rate 1e-4, no VLAN
•  ptp_config_select IEC61850-9-3: time_stamping hardware, network_transport L2, clientOnly 1, domainNumber 0, delay_mechanism P2P, logAnnounceInterval 0, logSyncInterval 0, logMinPdelayReqInterval 0, announceReceiptTimeout 3
• The model is loaded, then the simulation is started again once PTP is present, so that it starts on a PTP second.
• Network: HIL Ethernet port 2 connects to an industrial switch on our process bus. The grandmaster is a Meinberg on the same switch. Other PTP clients on the same switch with the same profile (linuxptp ptp4l, P2P, hardware timestamps) hold lock at about 200 ns rms, with a valid peer delay of about 570 ns.

What we observe

1. After a start, the Time Synchronization outputs read PTP = 1 and Synchronized = 1.
2. 15.7 s after the start, Synchronized drops to 0 and stays 0 for the rest of the run. PTP stays 1 the whole time (polled once per second).
3. The simulation does not track the grandmaster's time. We measure the phase of a 50 Hz sine source from the HIL at a PTP-synchronized merging unit, which time-stamps its samples against the same grandmaster. Over 12 s windows the phase drifts by −6 to −11 ppm. A separate 90 s run gave a steady −9.4 ppm, i.e. the simulation time runs about 9.4 µs per second slow. The drift starts right after the start, while Synchronized is still 1.
4. −10 ppm over 15.7 s is about 150 µs, which may be the limit at which Synchronized is cleared.
5. Restarting the simulation (stop and start, no reload) repeats the pattern every time.

Questions

1. Does the HIL604 steer its simulation time base to PTP continuously during a run (full device synchronization over Ethernet port 2), or does it only align the start?
2. What condition clears the Synchronized output while PTP stays 1, and what is the threshold?
3. Is there a way to read the PTP servo state, offset and path delay of the HIL during a run (status component, log, or API call)?
4. Is this a known issue with HIL604 firmware or THCC 2026.2, and is it fixed in 2026.3 or later?
5. Would IRIG-B on the HIL604 keep the simulation locked during the run, if PTP cannot?

We can provide the model file, packet captures of the PTP traffic on the HIL port, and the phase measurements if useful.

Best regards,