How to distribute burden on two CPUs (user and system) to address the CIO indication?

Question

Hello,

I am working with Typhoon HIL 402 device (Configuration 4) to estimate the semiconductor losses in a DAB converter. What I want is to operate the converter at 50 kHz. However, when I set the execution rate to 2e-5, it gives me the indication of CIO claiming of inaccurate readings (works fine with 5e-5). I tried to utilize the memory consumption between the two available CPUs as per this link, but still the problem exists.

Now I am not sure whether I am doing the utilization in the correct way. Any advice, comment regarding this is highly appreciated. 

Another doubt is whether the semiconductor loss estimation of Typhoon HIL accounts for the switching losses as well, if then, do I need to have a really small time step to capture the switching operation of the devices? Is this possible in a HIL 402 device?

Thanks

Answer 1

Hello Nishan,

If you are using the power loss calculation toolbox to calculate losses then switching losses can be estimated. This link might be useful for getting a better understanding of how it works. 

Is there any reason you are using such a small time step for the loss calculation? Usually there is no need for the time step to be equal to the switching period and a less demanding time step is chosen.

Best regards,

Luka

Comments

Hi Luka,

Thank you for the response. The link helped me to get a comprehensive idea on modeling the switches.

Also, in the beginning, I was under the impression that in order to capture the switching losses, I need to have a small time step for the executions. Seems like those are anyway done according to the FPGA's nano-second level time step, which is sufficient enough. Thus, I won't need this much of a small time step.

Thank you for the insights and advice.

BR, Nishan